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authorTommaso Merciai <tommaso.merciai.xr@bp.renesas.com>2025-10-01 23:26:53 +0200
committerGeert Uytterhoeven <geert+renesas@glider.be>2025-10-14 10:50:30 +0200
commite43b186df5c4635059f6213d100c9314c1570d02 (patch)
treecc9e03b484098d619b7dc96445bf6cd47dffdbce /tools/perf/scripts/python/bin
parentMerge tag 'renesas-r9a09g047-dt-binding-defs-tag5' into renesas-clk-for-v6.19 (diff)
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clk: renesas: r9a09g047: Add clock and reset entries for USB2
Add clock and reset entries for USB2. Signed-off-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20251001212709.579080-10-tommaso.merciai.xr@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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