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| author | Eugeni Dodonov <eugeni.dodonov@intel.com> | 2012-03-29 12:32:32 -0300 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2012-04-09 18:04:02 +0200 |
| commit | e93ea06aa0436f60a18962a195b95d8f36e9b7d6 (patch) | |
| tree | e8096eadb65004e0b2d54b6c7abbb941f850d408 /tools/perf/scripts/python/bin | |
| parent | drm/i915: add PIXCLK_GATE register (diff) | |
| download | linux-e93ea06aa0436f60a18962a195b95d8f36e9b7d6.tar.gz linux-e93ea06aa0436f60a18962a195b95d8f36e9b7d6.zip | |
drm/i915: add S PLL control
This PLL control can drive DDI ports at desired frequencies for
DisplayPort and FDI connections.
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'tools/perf/scripts/python/bin')
0 files changed, 0 insertions, 0 deletions