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| author | Marijn Suijten <marijn.suijten@somainline.org> | 2023-04-27 00:37:32 +0200 |
|---|---|---|
| committer | Dmitry Baryshkov <dmitry.baryshkov@linaro.org> | 2023-05-22 10:14:18 +0300 |
| commit | ec6e9b673ad56d019716298c15901d3a46e65c77 (patch) | |
| tree | 39e339d70acbbdc8ce29b1b51f8d7cd8bfd75db6 /tools/perf/scripts/python/bin | |
| parent | drm/msm/dpu: Factor out shared interrupt register in INTF_BLK macro (diff) | |
| download | linux-ec6e9b673ad56d019716298c15901d3a46e65c77.tar.gz linux-ec6e9b673ad56d019716298c15901d3a46e65c77.zip | |
drm/msm/dpu: Describe TEAR interrupt registers for DSI interfaces
All SoCs since DPU 5.0.0 have the tear interrupt registers moved out of
the PINGPONG block and into the INTF block. Wire up the IRQ register
masks in the interrupt table for enabling, reading and clearing them.
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/534244/
Link: https://lore.kernel.org/r/20230411-dpu-intf-te-v4-18-27ce1a5ab5c6@somainline.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Diffstat (limited to 'tools/perf/scripts/python/bin')
0 files changed, 0 insertions, 0 deletions