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authorYotam Gigi <yotamg@mellanox.com>2017-09-19 10:00:14 +0200
committerDavid S. Miller <davem@davemloft.net>2017-09-19 14:21:40 -0700
commit5080c7e91701744ef1a5d7aab51f568f889bfddb (patch)
tree837427d4273ec50d7f3b26a4fa0388475dcac6bf /tools/perf/scripts/python/call-graph-from-sql.py
parentmlxsw: reg: Add The Router TCAM Allocation register (diff)
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mlxsw: reg: Add the Router Interface Group Version 2 register
The RIGR-V2 register is used to add, remove and query egress interface list of a multicast forwarding entry and it will be used by the multicast router offloading logic. Signed-off-by: Yotam Gigi <yotamg@mellanox.com> Reviewed-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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