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authorJonathan Cameron <Jonathan.Cameron@huawei.com>2021-03-14 18:14:59 +0000
committerJonathan Cameron <Jonathan.Cameron@huawei.com>2021-04-07 08:36:36 +0100
commit9623caea2cfeeff614ec9062dfe76a48ca4185f5 (patch)
treeb6e244b9d899027b3151dd7320eeb2da358c5c25 /tools/perf/scripts/python/check-perf-trace.py
parentfea8f215012ea9ae0840bd94f9aa6105a1025c51 (diff)
downloadlinux-9623caea2cfeeff614ec9062dfe76a48ca4185f5.tar.gz
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staging:iio:cdc:ad7150: Rework interrupt handling.
Note this doesn't support everything the chip can do as we ignore window mode for now (in window / out of window). * Given the chip doesn't have any way of disabling the threshold pins, use disable_irq() etc to mask them except when we actually want them enabled (previously events were always enabled). Note there are race conditions, but using the current state from the status register and disabling interrupts across changes in type of event should mean those races result in interrupts, but no events to userspace. * Correctly reflect that there is one threshold line per channel. * Only take notice of rising edge. If anyone wants the other edge then they should set the other threshold (they are available for rising and falling directions). This isn't perfect but it makes it a lot simpler. * If insufficient interrupts are specified in firnware, don't support events. * Adaptive events use the same pos/neg values of thrMD as non adaptive ones. Tested against qemu based emulation. Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Reviewed-by: Alexandru Ardelean <ardeleanalex@gmail.com> Link: https://lore.kernel.org/r/20210314181511.531414-13-jic23@kernel.org
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