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authorBharat Kumar Gogada <bharat.kumar.gogada@xilinx.com>2016-02-11 21:58:11 +0530
committerBjorn Helgaas <bhelgaas@google.com>2016-03-08 14:25:57 -0600
commit01cf9d524ff06703dbed37014f34dba9c1b2434d (patch)
treee1f6d3a2956c1901555e7d127eb5fb4f50d07598 /tools/perf/scripts/python/event_analyzing_sample.py
parentPCI: xilinx: Update Zynq binding with Microblaze node (diff)
downloadlinux-01cf9d524ff06703dbed37014f34dba9c1b2434d.tar.gz
linux-01cf9d524ff06703dbed37014f34dba9c1b2434d.zip
microblaze/PCI: Support generic Xilinx AXI PCIe Host Bridge IP driver
Modify the Microblaze PCI subsystem to work with the generic drivers/pci/host/pcie-xilinx.c driver on Microblaze and Zynq. [bhelgaas: changelog] Signed-off-by: Bharat Kumar Gogada <bharatku@xilinx.com> Signed-off-by: Ravi Kiran Gummaluri <rgummal@xilinx.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'tools/perf/scripts/python/event_analyzing_sample.py')
0 files changed, 0 insertions, 0 deletions
generated by cgit v1.2.3 (git 2.39.1) at 2026-02-02 16:54:31 +0000
ink: https://lore.kernel.org/r/20250506022228.2587029-1-robh@kernel.org Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> 2025-05-16dt-bindings: timer: Convert marvell,orion-timer to DT schemaRob Herring (Arm)2-16/+43 Convert the Marvell Orion Timer binding to DT schema format. It's a straight-forward conversion. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://lore.kernel.org/r/20250506022305.2588431-1-robh@kernel.org Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> 2025-05-16clocksource/drivers/timer-tegra186: Remove unused bitsrobelin1-9/+0 The intention to keep the unsed if(0) block is gone now. Remove them for clean codes. Signed-off-by: robelin <robelin@nvidia.com> Acked-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20250507044311.3751033-4-robelin@nvidia.com Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> 2025-05-16clocksource/drivers/timer-tegra186: Fix watchdog self-pingingPohsun Su1-27/+0 This change removes watchdog self-pinging behavior. The timer irq handler is triggered due to the 1st expiration, the handler disables and enables watchdog but also implicitly clears the expiration count so the count can only be 0 or 1. Since this watchdog supports opened, configured, or pinged by systemd, We remove this behavior or the watchdog may not bark when systemd crashes since the 5th expiration never comes. Signed-off-by: Pohsun Su <pohsuns@nvidia.com> Signed-off-by: Robert Lin <robelin@nvidia.com> Link: https://lore.kernel.org/r/20250507044311.3751033-3-robelin@nvidia.com Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> 2025-05-16clocksource/drivers/timer-tegra186: Add WDIOC_GETTIMELEFT supportPohsun Su1-1/+63 This change adds support for WDIOC_GETTIMELEFT so userspace programs can get the number of seconds before system reset by the watchdog timer via ioctl. Signed-off-by: Pohsun Su <pohsuns@nvidia.com> Signed-off-by: Robert Lin <robelin@nvidia.com> Link: https://lore.kernel.org/r/20250507044311.3751033-2-robelin@nvidia.com Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> 2025-05-16dt-bindings: timer: Convert fsl,gtm to YAMLJ. Neuschäfer2-30/+83 Convert fsl,gtm.txt to YAML so that device trees using a Freescale General-purpose Timers Module can be properly validated. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: J. Neuschäfer <j.ne@posteo.net> Link: https://lore.kernel.org/r/20250412-gtm-yaml-v2-1-e4d2292ffefc@posteo.net Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> 2025-05-16clocksource/drivers/atmel_tcb: Fix kconfig dependencyArnd Bergmann1-2/+2 Build-testing this driver on arm without CONFIG_OF produces a warning: drivers/clocksource/timer-atmel-tcb.c:368:34: error: 'atmel_tcb_of_match' defined but not used [-Werror=unused-const-variable=] 368 | static const struct of_device_id atmel_tcb_of_match[] = { | ^~~~~~~~~~~~~~~~~~ Change the dependency to require CONFIG_OF for build testing to avoid the warning. Testing remains possible on all architectures as CONFIG_OF is user-selectable. Cc: Nicolas Ferre <nicolas.ferre@microchip.com> Cc: Claudiu Beznea <claudiu.beznea@tuxon.dev> Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de> Link: https://lore.kernel.org/r/20250409155313.1096915-1-arnd@kernel.org Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> 2025-05-16clocksource/drivers/nxp-timer: Add the System Timer Module for the s32gx ↵Daniel Lezcano3-0/+504 platforms STM supports commonly required system and application software timing functions. STM includes a 32-bit count-up timer and four 32-bit compare channels with a separate interrupt source for each channel. The timer is driven by the STM module clock divided by an 8-bit prescale value (1 to 256). STM has the following features: • One 32-bit count-up timer with an 8-bit prescaler • Four 32-bit compare channels • An independent interrupt source for each channel • Ability to stop the timer in Debug mode The s32g platform is declined into two versions, the s32g2 and the s32g3. The former has a STM block with 8 timers and the latter has 12 timers. The platform is designed to have one usable STM instance per core on the system which is composed of 3 x Cortex-M3 + 4 Cortex-A53 for the s32g2 and 3 x Cortex-M3 + 8 Cortex-A53 for the s32g3. There is a special STM instance called STM_TS which is dedicated to the timestamp. The 7th STM instance STM_07 is directly tied to the STM_TS which means it is not usable as a clockevent. The driver instantiate each STM described in the device tree as a clocksource and a clockevent conforming to the reference manual even if the Linux system does not use all of the clocksource. Each clockevent will have a cpumask set for a specific CPU. Given the counter is shared between the clocksource and the clockevent, the STM module can not be disabled by one or another so the refcounting mechanism is used to stop the counter when it reaches zero and to start it when it is one. The suspend and resume relies on the refcount to stop the module. As the device tree will have multiple STM entries, the driver can be probed in parallel with the async option but it is not enabled yet. However, the driver code takes care of preventing a race by putting a lock to protect the number of STM instances global variable which means it is ready to support the option when enough testing will be done with the underlying time framework. Cc: Ghennadi Procopciuc <ghennadi.procopciuc@oss.nxp.com> Cc: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Cc: Thomas Fossati <thomas.fossati@linaro.org> Suggested-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com> Link: https://lore.kernel.org/r/20250417151623.121109-3-daniel.lezcano@linaro.org Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>