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authorWANG Xuerui <git@xen0n.name>2023-05-01 17:19:10 +0800
committerHuacai Chen <chenhuacai@loongson.cn>2023-05-01 17:19:10 +0800
commitaa552254cf0039d83908105a07007f9ea616c119 (patch)
tree27ae8539eec4b6ef4f4c95cfac31f2ec93eff52c /tools/perf/scripts/python/event_analyzing_sample.py
parentLoongArch: Clean up the architectural interrupt definitions (diff)
downloadlinux-aa552254cf0039d83908105a07007f9ea616c119.tar.gz
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LoongArch: Define regular names for BCE/WATCH/HVC/GSPR exceptions
Define them according to the ISA manual, in order to enable matching the sub-exceptions for humanization purposes later. Signed-off-by: WANG Xuerui <git@xen0n.name> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
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