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| author | Imre Deak <imre.deak@intel.com> | 2020-02-26 22:34:48 +0200 |
|---|---|---|
| committer | Imre Deak <imre.deak@intel.com> | 2020-03-02 19:36:21 +0200 |
| commit | 45e4728b87ad03b3f9a0babe04cadef90c63291d (patch) | |
| tree | 77dcf4d150a2270a6158e94ce72bb0dcb3e9d38e /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | drm/i915/hsw: Use the DPLL ID when calculating DPLL clock (diff) | |
| download | linux-45e4728b87ad03b3f9a0babe04cadef90c63291d.tar.gz linux-45e4728b87ad03b3f9a0babe04cadef90c63291d.zip | |
drm/i915: Move DPLL frequency calculation to intel_dpll_mgr.c
Move all the DPLL params->DPLL frequency conversion functions to
intel_dpll_mgr.c where the corresponding inverse conversions are.
The GEN11+ TBT PLL outputs multiple frequencies and for selecting the
one in use we need to check the DDI CLK mux. As part of the DDI clock
logic this selection is kept in intel_ddi.c.
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200226203455.23032-7-imre.deak@intel.com
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions