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authorshaftarger <sholchen@gmail.com>2018-12-28 16:33:12 +0800
committerMark Brown <broonie@kernel.org>2019-01-07 18:15:54 +0000
commite1bc204894eae69b153eb63d9fd65414466fb639 (patch)
treec11e400be917d452bdea0c7f96ba1c9d4a10c8ee /tools/perf/scripts/python/export-to-postgresql.py
parentspi: add cpu details to fsl-dspi Kconfig help (diff)
downloadlinux-e1bc204894eae69b153eb63d9fd65414466fb639.tar.gz
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spi: dw: fix potential variable assignment error
spi::mode is defined by framework for several SPI capabilities, such as polarity, phase, bit-endian, wire number. Directly use this variable for setting controller's polarity and phase causes other bit in register being set. Since SPI framework has its definition, SPI_CPOL and SPI_CPHA offset may be changed by framwork change. Instead of just mask off the relevant bits, fetch required bit in spi::mode and set to register. Signed-off-by: shaftarger <shol@livemail.tw> Signed-off-by: Mark Brown <broonie@kernel.org>
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