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| author | Chris Brandt <chris.brandt@renesas.com> | 2026-02-26 20:52:16 -0500 |
|---|---|---|
| committer | Biju Das <biju.das.jz@bp.renesas.com> | 2026-03-02 10:28:38 +0000 |
| commit | fb797a70108f3fda83fde6dea30bee4be7d5df8b (patch) | |
| tree | 7663663524de975de46edb01883d967bafd3f186 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | 89ff45359abbf9d8d3c4aa3f5a57ed0be82b5a12 (diff) | |
| download | linux-fb797a70108f3fda83fde6dea30bee4be7d5df8b.tar.gz linux-fb797a70108f3fda83fde6dea30bee4be7d5df8b.zip | |
drm: renesas: rz-du: mipi_dsi: Set DSI divider
Before the MIPI DSI clock source can be configured, the target divide
ratio needs to be set.
Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Tested-by: Biju Das <biju.das.jz@bp.renesas.com>
Fixes: 5a4326f2e3b1 ("clk: renesas: rzg2l: Remove DSI clock rate restrictions")
Link: https://patch.msgid.link/20260227015216.2721504-1-chris.brandt@renesas.com
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions