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| author | Sean Christopherson <seanjc@google.com> | 2022-06-14 21:58:30 +0000 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2022-06-20 06:21:20 -0400 |
| commit | 308a4fffeb361af90f17837c1bcace3139d1f677 (patch) | |
| tree | 376f26be8d3040cf36a25c3762595c072de715b7 /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | 5d76b1f8c79309c0b60c8db5f16774f1691945a7 (diff) | |
| download | linux-308a4fffeb361af90f17837c1bcace3139d1f677.tar.gz linux-308a4fffeb361af90f17837c1bcace3139d1f677.zip | |
KVM: nVMX: Save BNDCFGS to vmcs12 iff relevant controls are exposed to L1
Save BNDCFGS to vmcs12 (from vmcs02) if and only if at least of one of
the load-on-entry or clear-on-exit fields for BNDCFGS is enumerated as an
allowed-1 bit in vmcs12. Skipping the field avoids an unnecessary VMREAD
when MPX is supported but not exposed to L1.
Per Intel's SDM:
If the processor supports either the 1-setting of the "load IA32_BNDCFGS"
VM-entry control or that of the "clear IA32_BNDCFGS" VM-exit control, the
contents of the IA32_BNDCFGS MSR are saved into the corresponding field.
Signed-off-by: Sean Christopherson <seanjc@google.com>
Message-Id: <20220614215831.3762138-5-seanjc@google.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions
