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| author | Chris Park <Chris.Park@amd.com> | 2020-10-19 14:32:14 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2020-11-02 15:30:58 -0500 |
| commit | 91bda9e9d248c749f99cc85538d16444507466f7 (patch) | |
| tree | e812a07386ad05be1f67bfff7bd83668966e1ed1 /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | drm/amd/display: fail instead of div by zero/bugcheck (diff) | |
| download | linux-91bda9e9d248c749f99cc85538d16444507466f7.tar.gz linux-91bda9e9d248c749f99cc85538d16444507466f7.zip | |
drm/amd/display: Update panel register
[Why]
Incorrect panel register settings are
applied for power sequence because the
register macro is not defined in resource.
[How]
Implement same register space to future
resource files.
Signed-off-by: Chris Park <Chris.Park@amd.com>
Reviewed-by: Joshua Aberback <Joshua.Aberback@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions