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authorTony Cheng <tony.cheng@amd.com>2017-09-25 18:06:11 -0400
committerAlex Deucher <alexander.deucher@amd.com>2017-10-21 16:43:36 -0400
commita32a7708ae8b01c191768d503c1af33b85b369d0 (patch)
treed1b851ccbb0ab5c161813c76b799cc34e77be82a /tools/perf/scripts/python/export-to-sqlite.py
parentdrm/amd/display: enable optional pipe split for single display (diff)
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drm/amd/display: add option to disable DCC for DCC 128b request
1. reverts commit e67f51012740 ("dc: temp disable DCC on high res.") - default still DCC enabled 2. add debug options to decide how DCC is disabled - disable DCC - disable DCC if DCC requires 128b (aka. half) request -- observed compressed data corruption result in screen corruption in full (256b) request while half (128b) would cause DCN to hang, result in DF hang Signed-off-by: Tony Cheng <tony.cheng@amd.com> Reviewed-by: Yongqiang Sun <yongqiang.sun@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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