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| author | Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> | 2018-10-31 23:59:44 +0100 |
|---|---|---|
| committer | Ulf Hansson <ulf.hansson@linaro.org> | 2018-12-17 08:26:24 +0100 |
| commit | df7507b50b496ad9c2da6ad1405ea04c4dfdcc4d (patch) | |
| tree | e315b6ad9bd84966c6971a11fb83778452e0f1bc /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | mmc: sdhci-cadence: include <linux/bits.h> instead of <linux/bitops.h> (diff) | |
| download | linux-df7507b50b496ad9c2da6ad1405ea04c4dfdcc4d.tar.gz linux-df7507b50b496ad9c2da6ad1405ea04c4dfdcc4d.zip | |
mmc: renesas_sdhi: remove workaround for HS400 clock
The driver sets an incorrect clock and depends on the clock driver
knowledge of this incorrect setting to still set a 200Mhz SDn clock.
Instead of spreading the workaround between the two drivers the clock
driver should be made aware of the ES versions where the special clock
handling is needed no need to keep this workaround in the SDHI driver.
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions