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authorDon Hiatt <don.hiatt@intel.com>2019-11-15 15:15:38 -0800
committerJoonas Lahtinen <joonas.lahtinen@linux.intel.com>2019-11-18 16:36:44 +0200
commite367925e80b5a0a7d8db5b629c767f288f0aed4b (patch)
treeac8363a38e369a60b37bbcd5928393143118395c /tools/perf/scripts/python/export-to-sqlite.py
parentdrm/i915/gt: Wait for new requests in intel_gt_retire_requests() (diff)
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drm/i915/guc: Skip suspend/resume GuC action on platforms w/o GuC submission
On some platforms (e.g. KBL) that do not support GuC submission, but the user enabled the GuC communication (e.g for HuC authentication) calling the GuC EXIT_S_STATE action results in lose of ability to enter RC6. We can remove the GuC suspend/resume entirely as we do not need to save the GuC submission status. Add intel_guc_submission_is_enabled() function to determine if GuC submission is active. v2: Do not suspend/resume the GuC on platforms that do not support Guc Submission. v3: Fix typo, move suspend logic to remove goto. v4: Use intel_guc_submission_is_enabled() to check GuC submission status. v5: No need to look at engine to determine if submission is enabled. Squash fix + intel_guc_submission_is_enabled() patch into one. v6: Move resume check into intel_guc_resume() for symmetry. Fix commit Fixes tag. Reported-by: KiteStramuort <kitestramuort@autistici.org> Reported-by: S. Zharkoff <s.zharkoff@gmail.com> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111594 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111623 Fixes: ffd5ce22faa4 ("drm/i915/guc: Updates for GuC 32.0.3 firmware") Cc: Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: Daniele Ceralo Spurio <daniele.ceraolospurio@intel.com> Cc: Stuart Summers <stuart.summers@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Tested-by: Tomas Janousek <tomi@nomi.cz> Signed-off-by: Don Hiatt <don.hiatt@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20191115231538.1249-1-don.hiatt@intel.com (cherry picked from commit 82e0c5bbd6eb1d274b5a3e519ff0ab91f1f8e537) Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions
>MIPS: Watch: Avoid duplication of bits in mips_install_watch_registers.Matt Redfearn1-10/+7 2018-01-22MIPS: MSA: Update helpers to use new asm macrosJames Hogan1-44/+19 2018-01-22MIPS: XPA: Standardise readx/writex accessorsJames Hogan1-10/+10 2018-01-22MIPS: XPA: Allow use of $0 (zero) to MTHC0James Hogan1-2/+2 2018-01-22MIPS: XPA: Use XPA instructions in assemblyJames Hogan2-10/+22 2018-01-22MIPS: VZ: Pass GC0 register names in $n formatJames Hogan1-188/+188 2018-01-22MIPS: VZ: Update helpers to use new asm macrosJames Hogan1-127/+37 2018-01-22MIPS: Add helpers for assembler macro instructionsJames Hogan1-0/+83 2018-01-22MIPS: ranchu: Add Ranchu as a new generic-based boardMiodrag Dinic5-0/+140 2018-01-18MIPS: Use proper kernel-doc Return keywordMathieu Malaterre1-1/+1 2018-01-18MIPS: Loongson64: Drop 32-bit support for Loongson 2E/2F devicesJiaxun Yang1-2/+0 2018-01-18MIPS: ingenic: Initial GCW Zero supportPaul Cercueil4-0/+94 2018-01-18devicetree/bindings: Add GCW vendor prefixPaul Cercueil1-0/+1 2018-01-18MIPS: JZ4770: Work around config2 misreporting associativityMaarten ter Huurne1-0/+9 2018-01-18MIPS: ingenic: Initial JZ4770 supportPaul Cercueil3-1/+219 2018-01-18MIPS: ingenic: Detect machtype from SoC compatible stringPaul Cercueil2-4/+19 2018-01-18MIPS: platform: add machtype IDs for more Ingenic SoCsPaul Cercueil1-0/+2 2018-01-18MIPS: ingenic: Use common cmdline handling codePaul Burton1-22/+2 2018-01-18MIPS: Setup boot_command_line before plat_mem_setupPaul Burton1-19/+20 2018-01-18clk: Add Ingenic jz4770 CGU driverPaul Cercueil2-0/+484