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| author | Mac Chiang <mac.chiang@intel.com> | 2025-12-19 11:49:02 +0800 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2025-12-22 09:00:35 +0000 |
| commit | e4ca5ecc3c411f2fe970369f55bb72ac96adea85 (patch) | |
| tree | 01f9a9f2208261616d64af5541901f75338a15b2 /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | ASoC: Intel: mtl-match: Add 6-amp matches for CS35L56 (diff) | |
| download | linux-e4ca5ecc3c411f2fe970369f55bb72ac96adea85.tar.gz linux-e4ca5ecc3c411f2fe970369f55bb72ac96adea85.zip | |
ASoC: Intel: sof_sdw: shift SSP BT mask bits.
The SSP BT mask bits overlapped with SOC_SDW_CODEC_SPKR,
SOC_SDW_SIDECAR_AMPS, and SOC_SDW_CODEC_MIC BIT[15–17] in
sdw_utils.h. Shift the SSP BT mask bits to a higher range to
eliminate the conflict.
Signed-off-by: Mac Chiang <mac.chiang@intel.com>
Signed-off-by: Bard Liao <yung-chuan.liao@linux.intel.com>
Link: https://patch.msgid.link/20251219034902.3630537-1-yung-chuan.liao@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions