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| author | Jun Lei <jun.lei@amd.com> | 2020-05-26 11:17:53 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2020-07-01 01:59:20 -0400 |
| commit | 0a25e8eb95cd7bf28857ef671296154c25b1fb44 (patch) | |
| tree | d6da45a57034e164e113545df943d64b3c254027 /tools/perf/scripts/python/exported-sql-viewer.py | |
| parent | drm/amd/display: Revert "DP link layer test 4.2.1.1 fix due to specs update" (diff) | |
| download | linux-0a25e8eb95cd7bf28857ef671296154c25b1fb44.tar.gz linux-0a25e8eb95cd7bf28857ef671296154c25b1fb44.zip | |
drm/amd/display: add support for per-state dummy-pstate latency
[why]
Dummy pstate latency actually varies between different
UCLK frequencies, when calculating watermark C, if DAL
always assumes worst case, then it can lead to dummy
pstate not supported scenarios.
[how]
Rather than statically calculating dummy pstate using
worst case, we store the entire table of UCLK to dummy
pstate relationships. On a per mode basis, we calculate
the actual UCLK lower limit, and use the dynamic worst
case dummy pstate latency. This prevents the situation
where we don't support full p-state (which will force
high DPM), but still use low DPM dummy pstate latency.
Signed-off-by: Jun Lei <jun.lei@amd.com>
Reviewed-by: Joshua Aberback <Joshua.Aberback@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'tools/perf/scripts/python/exported-sql-viewer.py')
0 files changed, 0 insertions, 0 deletions