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| author | Wenjing Liu <wenjing.liu@amd.com> | 2024-04-08 13:32:53 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2024-05-08 15:17:03 -0400 |
| commit | 176278d8bff2c2be000b9c9509a7fc8120b5278d (patch) | |
| tree | 01049fadbf592cea66a1d51928aba0627165e759 /tools/perf/scripts/python/exported-sql-viewer.py | |
| parent | 3706bf2eba8d90887bdb7e05f9227686848e1342 (diff) | |
| download | linux-176278d8bff2c2be000b9c9509a7fc8120b5278d.tar.gz linux-176278d8bff2c2be000b9c9509a7fc8120b5278d.zip | |
drm/amd/display: reset DSC clock in post unlock update
[why]
Switching between DSC clock or disable DSC block are not double buffered update.
Corruption is observed if these updates happen before DSC double buffered
disconnection.
[how]
Move DSC disable and refclk reset to post unlock update. Wait for DSC double buffered
disconnection and all mpccs are disconnected before reset DSC clock.
Reviewed-by: Samson Tam <samson.tam@amd.com>
Acked-by: Tom Chung <chiahsuan.chung@amd.com>
Signed-off-by: Wenjing Liu <wenjing.liu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'tools/perf/scripts/python/exported-sql-viewer.py')
0 files changed, 0 insertions, 0 deletions