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authorJonathan Cameron <Jonathan.Cameron@huawei.com>2022-05-08 18:56:50 +0100
committerJonathan Cameron <Jonathan.Cameron@huawei.com>2022-06-14 11:53:18 +0100
commitf890aaac771bd015c348eddb967b4027e88344c0 (patch)
treec7dcbb907ebd75fddd6b08a0a09fb9719eb4243e /tools/perf/scripts/python/exported-sql-viewer.py
parentiio: frequency: admv1014: Fix alignment for DMA safety (diff)
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iio: frequency: admv4420: Fix alignment for DMA safety
____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Fixes: b59c04155901 ("iio: frequency: admv4420.c: Add support for ADMV4420") Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Acked-by: Nuno Sá <nuno.sa@analog.com> Link: https://lore.kernel.org/r/20220508175712.647246-71-jic23@kernel.org
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