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| author | Lionel Landwerlin <lionel.g.landwerlin@intel.com> | 2019-10-25 15:17:18 +0300 |
|---|---|---|
| committer | Chris Wilson <chris@chris-wilson.co.uk> | 2019-10-25 18:29:05 +0100 |
| commit | ba1d18e386d991356f59bbb417b0c642abf671fa (patch) | |
| tree | bef606309697d880deb8f4f6196403a77e98a748 /tools/perf/scripts/python/failed-syscalls-by-pid.py | |
| parent | drm/i915: Fix PCH reference clock for FDI on HSW/BDW (diff) | |
| download | linux-ba1d18e386d991356f59bbb417b0c642abf671fa.tar.gz linux-ba1d18e386d991356f59bbb417b0c642abf671fa.zip | |
drm/i915: capture aux page table error register
TGL introduced a feature in which we map the main surface to the
auxiliary surface. If we screw up the page tables, the HW has a
register to tell us which engine encounters a fault in the page table
walk.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Chris Wilson <chris@chris-wilson.co.uk>
[ickle: Be brave and apply to gen12]
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20191025121718.18806-1-lionel.g.landwerlin@intel.com
Diffstat (limited to 'tools/perf/scripts/python/failed-syscalls-by-pid.py')
0 files changed, 0 insertions, 0 deletions