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| author | AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> | 2022-12-14 14:11:16 +0100 |
|---|---|---|
| committer | Matthias Brugger <matthias.bgg@gmail.com> | 2023-01-09 17:16:48 +0100 |
| commit | 1bd1d10d1c0cbb82ae42c5255821202e045e4c2b (patch) | |
| tree | 3afba76f3009883a9b14dd258b379e2cb960279d /tools/perf/scripts/python/flamegraph.py | |
| parent | dt-bindings: arm64: dts: mediatek: Add mt8365-evk board (diff) | |
| download | linux-1bd1d10d1c0cbb82ae42c5255821202e045e4c2b.tar.gz linux-1bd1d10d1c0cbb82ae42c5255821202e045e4c2b.zip | |
arm64: dts: mediatek: mt8195: Use P1 clocks for PCIe1 controller
Despite there being some flexibility regarding the P0/P1 connections,
especially for TL and PERI, we must use P1 clocks on pcie1 otherwise
we'll be dealing with unclocked access.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20221214131117.108008-1-angelogioacchino.delregno@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Diffstat (limited to 'tools/perf/scripts/python/flamegraph.py')
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