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| author | Neil Armstrong <neil.armstrong@linaro.org> | 2025-02-28 09:40:25 +0100 |
|---|---|---|
| committer | Bjorn Andersson <andersson@kernel.org> | 2025-03-13 17:10:26 -0500 |
| commit | 9ce52e908bd5c0a93a3f17ef28d19209873b573f (patch) | |
| tree | d96a2a2f8a2c4d618401ce9a1b212dfd8a79478a /tools/perf/scripts/python/flamegraph.py | |
| parent | a3daa844ed8104617174bc1ac4554f8b88a9c878 (diff) | |
| download | linux-9ce52e908bd5c0a93a3f17ef28d19209873b573f.tar.gz linux-9ce52e908bd5c0a93a3f17ef28d19209873b573f.zip | |
arm64: dts: qcom: sm8650: switch to interrupt-cells 4 to add PPI partitions
The ARM PMUs shares the same per-cpu (PPI) interrupt, so we need to switch
to interrupt-cells = <4> in the GIC node to allow adding an interrupt
partition map phandle as the 4th cell value for GIC_PPI interrupts.
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250228-topic-sm8650-pmu-ppi-partition-v4-1-78cffd35c73d@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/flamegraph.py')
0 files changed, 0 insertions, 0 deletions