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authorMatt Roper <matthew.d.roper@intel.com>2022-01-10 21:15:59 -0800
committerMatt Roper <matthew.d.roper@intel.com>2022-01-11 14:03:25 -0800
commit24ce4d6d2ca626a733f70b578c4a298b200a69de (patch)
treed4593f3c383dc694f7ecdf4cfc03d5cf89019f4b /tools/perf/scripts/python/netdev-times.py
parentdrm/i915: Move combo PHY registers to their own header (diff)
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drm/i915: Move TC PHY registers to their own header
Registers representing the MG/DKL TC PHYs (including the TC DPLLs which exist inside the PHY) are only needed in a couple files and on specific platforms; let's keep them separate from the general register pool. Cc: Jani Nikula <jani.nikula@linux.intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220111051600.3429104-11-matthew.d.roper@intel.com
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