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| author | Athira Rajeev <atrajeev@linux.vnet.ibm.com> | 2020-11-26 11:54:39 -0500 |
|---|---|---|
| committer | Michael Ellerman <mpe@ellerman.id.au> | 2020-12-04 01:01:28 +1100 |
| commit | e924be7b0b0d1f37d0509c854a92c7a71e3cdfe7 (patch) | |
| tree | 24af1f6d10aea9212dc2dfad97ff65c34aba4123 /tools/perf/scripts/python/netdev-times.py | |
| parent | powerpc/perf: Fix to update radix_scope_qual in power10 (diff) | |
| download | linux-e924be7b0b0d1f37d0509c854a92c7a71e3cdfe7.tar.gz linux-e924be7b0b0d1f37d0509c854a92c7a71e3cdfe7.zip | |
powerpc/perf: Update the PMU group constraints for l2l3 events in power10
In Power9, L2/L3 bus events are always available as a
"bank" of 4 events. To obtain the counts for any of the
l2/l3 bus events in a given bank, the user will have to
program PMC4 with corresponding l2/l3 bus event for that
bank.
Commit 59029136d750 ("powerpc/perf: Add constraints for power9 l2/l3 bus events")
enforced this rule in Power9. But this is not valid for
Power10, since in Power10 Monitor Mode Control Register2
(MMCR2) has bits to configure l2/l3 event bits. Hence remove
this PMC4 constraint check from power10.
Since the l2/l3 bits in MMCR2 are not per-pmc, patch handles
group constrints checks for l2/l3 bits in MMCR2.
Fixes: a64e697cef23 ("powerpc/perf: power10 Performance Monitoring support")
Signed-off-by: Athira Rajeev <atrajeev@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/1606409684-1589-3-git-send-email-atrajeev@linux.vnet.ibm.com
Diffstat (limited to 'tools/perf/scripts/python/netdev-times.py')
0 files changed, 0 insertions, 0 deletions