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authorPrike Liang <Prike.Liang@amd.com>2024-06-14 21:25:44 +0800
committerAlex Deucher <alexander.deucher@amd.com>2024-09-02 11:40:21 -0400
commit072b4414784524b6debda1b3b2ffbf10d66095e9 (patch)
treeb9ea95e48f912d2e269fcd4020eae9cd9468d453 /tools/perf/scripts/python/parallel-perf.py
parentdrm/amd/display: 3.2.299 (diff)
downloadlinux-072b4414784524b6debda1b3b2ffbf10d66095e9.tar.gz
linux-072b4414784524b6debda1b3b2ffbf10d66095e9.zip
drm/amdgpu/gfx11: fallback to driver reset compute queue directly (v2)
Since the MES FW resets kernel compute queue always failed, this may caused by the KIQ failed to process unmap KCQ. So, before MES FW work properly that will fallback to driver executes dequeue and resets SPI directly. Besides, rework the ring reset function and make the busy ring type reset in each function respectively. Acked-by: Vitaly Prosyak <vitaly.prosyak@amd.com> Signed-off-by: Prike Liang <Prike.Liang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'tools/perf/scripts/python/parallel-perf.py')
0 files changed, 0 insertions, 0 deletions
-01-28 13:18:44 +0900'>2008-01-28sh: flush_cache_sigtramp() takes 1 arg only.Paul Mundt1-1/+1 2008-01-28sh: Move vsyscall_init() defs up one level.Paul Mundt2-6/+6 2008-01-28sh: Nopped out p3_cache_init() on SH-5 also.Paul Mundt1-0/+1 2008-01-28sh: Fix up VMALLOC_START for SH-5.Paul Mundt1-0/+4 2008-01-28sh: Move over the SH-5 head.S and tlb.h.Paul Mundt6-44/+24 2008-01-28sh: Have SH-5 provide an {en,dis}able_fpu() impl.Paul Mundt3-10/+21 2008-01-28sh: Disable initial cache flush on SH-5.Paul Mundt1-14/+18 2008-01-28sh: Don't reference UBC code in CPU init on sh64.Paul Mundt1-1/+6 2008-01-28sh: imask IRQ depends on sh32.Paul Mundt1-1/+2 2008-01-28sh: Move in the SH-5 traps.c impl.Paul Mundt4-3/+2