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| author | Gustavo Sousa <gustavo.sousa@intel.com> | 2024-11-08 09:57:07 -0300 |
|---|---|---|
| committer | Matt Roper <matthew.d.roper@intel.com> | 2024-11-08 09:53:57 -0800 |
| commit | 359d2cc1f394ed62ed01540a486e744d47674c39 (patch) | |
| tree | cbc2b243534909b57a9b265ee8cb93fe9edc1a90 /tools/perf/scripts/python/parallel-perf.py | |
| parent | drm/i915/dmc_wl: Use i915_mmio_reg_offset() instead of reg.reg (diff) | |
| download | linux-359d2cc1f394ed62ed01540a486e744d47674c39.tar.gz linux-359d2cc1f394ed62ed01540a486e744d47674c39.zip | |
drm/xe: Mimic i915 behavior for non-sleeping MMIO wait
In upcoming display changes, we will modify the DMC wakelock MMIO
waiting code to choose a non-sleeping variant implementation, because
the wakelock is also taking in atomic context.
While xe provides an explicit parameter (namely "atomic") to prevent
xe_mmio_wait32() from sleeping, i915 does not and implements that
behavior when slow_timeout_ms is zero.
So, for now, let's mimic what i915 does to allow for display to use
non-sleeping MMIO wait. In the future, we should come up with a better
and explicit interface for this behavior in i915, at least while display
code is not an independent entity with proper interfaces between xe and
i915.
v2:
- Make the tone in comment the comment added in
__intel_wait_for_register() more explanatory than a FIXME-like text.
(Luca)
Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241108130218.24125-3-gustavo.sousa@intel.com
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