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authorChris Wilson <chris@chris-wilson.co.uk>2016-08-18 17:16:41 +0100
committerChris Wilson <chris@chris-wilson.co.uk>2016-08-18 22:36:23 +0100
commit3497971a71d8b15a41b7bf2bf66ebf5909b2bd3f (patch)
treedc76c33e66248e3ad1ad990e75396a61cfcc6e89 /tools/perf/scripts/python/stackcollapse.py
parentdrm/i915: Unconditionally flush any chipset buffers before execbuf (diff)
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agp/intel: Flush chipset writes after updating a single PTE
After we update one PTE for a page, the caller expects to be able to immediately use that through a GGTT read/write. To comply with the callers expectations we therefore need to flush the chipset buffers before returning. Reported-by: Matti Hämäläinen <ccr@tnsp.org> Fixes: d6473f566417 ("drm/i915: Add support for mapping an object page...") Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Ankitprasad Sharma <ankitprasad.r.sharma@intel.com> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Tested-by: Matti Hämäläinen <ccr@tnsp.org> Cc: drm-intel-fixes@lists.freedesktop.org Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20160818161718.27187-2-chris@chris-wilson.co.uk
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