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authorDave Jiang <dave.jiang@intel.com>2024-08-08 16:18:01 -0700
committerRafael J. Wysocki <rafael.j.wysocki@intel.com>2024-08-29 19:04:22 +0200
commit6143f9616627ddbfdf827795745fa4d9db166bc2 (patch)
tree32ceb5578cec7999b7cfbc3ce3701b3a8fce19d2 /tools/perf/scripts/python/stackcollapse.py
parentACPICA: Avoid warning for Dump Functions (diff)
downloadlinux-6143f9616627ddbfdf827795745fa4d9db166bc2.tar.gz
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ACPICA: HMAT: Add extended linear address mode to MSCIS
ACPICA commit aaa08569b81aa4d9ff59f91f00e589e98d499e6c Redefine the 2 reserved bytes at offset 28 of Memory Side Cache Information Structure as "Address Mode" and add defines of the new value. * 0 - Reserved (Unkown Address Mode) * 1 - Extended-linear (N direct-map aliases linearly mapped) * 2..65535 - Reserved (Unknown Address Mode) Link: https://github.com/acpica/acpica/commit/aaa08569 Signed-off-by: Dave Jiang <dave.jiang@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
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