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| author | Chris Wilson <chris@chris-wilson.co.uk> | 2019-11-18 18:49:33 +0000 |
|---|---|---|
| committer | Chris Wilson <chris@chris-wilson.co.uk> | 2019-11-19 10:11:29 +0000 |
| commit | b6422694c5853f7a4faf00431c9d7b5368138152 (patch) | |
| tree | d629bfa2285133c24ab29e6c81ae43e5a6f1a5f3 /tools/perf/scripts/python/stackcollapse.py | |
| parent | d147483884ed08ee6bb618ef610ee0329a27fda7 (diff) | |
| download | linux-b6422694c5853f7a4faf00431c9d7b5368138152.tar.gz linux-b6422694c5853f7a4faf00431c9d7b5368138152.zip | |
drm/i915/gt: Only wait for register chipset flush if active
Only serialise with the chipset using an mmio if the chipset is
currently active. We expect that any writes into the chipset range will
simply be forgotten until it wakes up.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191118184943.2593048-8-chris@chris-wilson.co.uk
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions