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| author | Arun R Murthy <arun.r.murthy@intel.com> | 2023-04-25 08:29:44 +0530 |
|---|---|---|
| committer | Jani Nikula <jani.nikula@intel.com> | 2023-05-02 16:18:09 +0300 |
| commit | f60500f31e99fe5e641071d2ed4a8164a8050701 (patch) | |
| tree | 8f322711bb99346400deb6fcc630911fd26a1ba1 /tools/perf/scripts/python/stackcollapse.py | |
| parent | drm/i915/mtl: Enable TC ports (diff) | |
| download | linux-f60500f31e99fe5e641071d2ed4a8164a8050701.tar.gz linux-f60500f31e99fe5e641071d2ed4a8164a8050701.zip | |
drm/i915/display/dp: 128/132b LT requirement
For 128b/132b LT prior to LT DPTX should set power state, DP channel
coding and then link rate.
v2: added separate function to avoid code duplication(Jani N)
v3: DP2.1 section 3.5.2.16 is ordered, 3.5.1.2 is unordered and hence
discarding <Ville>
Signed-off-by: Arun R Murthy <arun.r.murthy@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230425025944.151744-1-arun.r.murthy@intel.com
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions