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| author | Arkadi Sharshevsky <arkadis@mellanox.com> | 2017-03-28 17:24:12 +0200 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2017-03-28 17:11:54 -0700 |
| commit | 230ead0141be9668fbaf6c0b708533064d46a9a2 (patch) | |
| tree | 25ba3a33fed2e996548f1d4fc90d517204523732 /tools/perf/scripts/python/syscall-counts.py | |
| parent | mlxsw: reg: Add counter fields to RITR register (diff) | |
| download | linux-230ead0141be9668fbaf6c0b708533064d46a9a2.tar.gz linux-230ead0141be9668fbaf6c0b708533064d46a9a2.zip | |
mlxsw: spectrum: Add placeholder for dpipe
Add placeholder for dpipe. Support for specific tables and headers will
be introduced in following patches. The headers are shared between all
mlxsw_sp instances.
Signed-off-by: Arkadi Sharshevsky <arkadis@mellanox.com>
Signed-off-by: Jiri Pirko <jiri@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'tools/perf/scripts/python/syscall-counts.py')
0 files changed, 0 insertions, 0 deletions