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authorPatrik Dahlström <risca@dalakolonin.se>2023-04-08 13:48:19 +0200
committerJonathan Cameron <jonathan.cameron@huawei.com>2023-04-13 11:37:21 +0100
commit79d9622d622d49d6c14c51edec2059b8591e7975 (patch)
tree6fdfd60b5da89aeafa52312132891bf6a2a44e5e /tools/perf/scripts/python/syscall-counts.py
parentiio: adc: palmas: Take probe fully device managed. (diff)
downloadlinux-79d9622d622d49d6c14c51edec2059b8591e7975.tar.gz
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iio: adc: palmas: remove adc_wakeupX_data
It does not seem to be used by anyone and later patches in this series are made simpler by first removing this. There is now a lot of dead code that cannot be reached, until later patches revive it. Arguably, this is preferred over removing the code only to add it again. Signed-off-by: Patrik Dahlström <risca@dalakolonin.se> Link: https://lore.kernel.org/r/20230408114825.824505-4-risca@dalakolonin.se Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Diffstat (limited to 'tools/perf/scripts/python/syscall-counts.py')
0 files changed, 0 insertions, 0 deletions
>-2/+1 2013-12-14clk: emev2: Add support for emev2 SMU clocks with DTTakashi Yoshii3-1/+203 2013-12-12MAINTAINERS: Add maintainer for the ARM Ux500 clock driverUlf Hansson1-0/+8 2013-12-12clk: shmobile: Add MSTP clock supportLaurent Pinchart3-0/+281 2013-12-12clk: shmobile: Add DIV6 clock supportLaurent Pinchart3-0/+214 2013-12-12clk: shmobile: Add R-Car Gen2 clocks supportLaurent Pinchart5-0/+355 2013-12-11clk: hi3620: add gate clock flagHaojian Zhuang1-59/+59 2013-12-11clk: hi3620: fix wrong flags on dividerHaojian Zhuang1-11/+11 2013-12-04clk: exynos5420: fix cpll clock register offsetsChander Kashyap1-2/+2 2013-12-04clk: hisilicon: add common clock supportHaojian Zhuang8-0/+823 2013-11-28clk: tegra: fix __clk_lookup() return value checksWei Yongjun1-4/+4 2013-11-28clk: tegra: Do not print errors for clk_round_rate()Thierry Reding1-6/+3 2013-11-27clk: socfpga: Remove check for "reg" property in socfpga_clk_initDinh Nguyen1-3/+1 2013-11-27clk: fixed-factor: Fix device-tree binding typoEzequiel Garcia1-2/+2 2013-11-27clk: clean up everything on debugfs errorAlex Elder1-1/+2 2013-11-26clk: tegra: Initialize DSI low-power clocksThierry Reding1-0/+2 2013-11-26clk: tegra: add FUSE clock deviceAlexandre Courbot4-1/+4 2013-11-26clk: tegra: Properly setup PWM clock on Tegra30Thierry Reding1-1/+3 2013-11-26clk: tegra: Initialize secondary gr3d clock on Tegra30Thierry Reding1-0/+1 2013-11-26clk: tegra114: Initialize clocks needed for HDMIMikko Perttunen1-0/+2 2013-11-26clk: tegra124: add suspend/resume function for tegra_cpu_car_opsJoseph Lo1-0/+27 2013-11-26clk: tegra124: add wait_for_reset and disable_clock for tegra_cpu_car_opsJoseph Lo1-0/+26 2013-11-26clk: tegra124: Add support for Tegra124 clocksPeter De Schrijver4-0/+1771 2013-11-26clk: tegra124: Add new peripheral clocksPeter De Schrijver1-0/+69 2013-11-26clk: tegra124: Add common clk IDs to clk-id.hPeter De Schrijver1-0/+22 2013-11-26clk: tegra: add TEGRA_PERIPH_NO_GATEPeter De Schrijver3-3/+22 2013-11-26clk: tegra: add locking to periph clksPeter De Schrijver2-19/+24 2013-11-26clk: tegra: Add periph regs bank XPeter De Schrijver1-0/+10 2013-11-26clk: tegra: Add support for PLLSSPeter De Schrijver2-2/+126 2013-11-26clk: tegra: move tegra20 to common infraPeter De Schrijver1-402/+255 2013-11-26clk: tegra: move tegra30 to common infraPeter De Schrijver1-895/+403 2013-11-26clk: tegra: introduce common gen4 super clockPeter De Schrijver4-74/+155 2013-11-26clk: tegra: move PMC, fixed clocks to common filesPeter De Schrijver5-74/+253 2013-11-26clk: tegra: move periph clocks to common filePeter De Schrijver6-581/+627 2013-11-26clk: tegra: move audio clk to common filePeter De Schrijver4-208/+402 2013-11-26clk: tegra: add clkdev registration infraPeter De Schrijver3-159/+179 2013-11-26clk: tegra: add common infra for DT clocksPeter De Schrijver2-0/+16