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| author | Daniel Vetter <daniel.vetter@ffwll.ch> | 2015-10-28 23:58:56 +0200 |
|---|---|---|
| committer | Jani Nikula <jani.nikula@intel.com> | 2015-11-12 16:42:23 +0200 |
| commit | 01a6908c0c7a0f7dfae50026945340b9efcd2e3e (patch) | |
| tree | 5383894602e1b96acc9bd98db7f0f87ba1ee6782 /tools/perf/scripts/python | |
| parent | drm/i915/gen9: csr_init after runtime pm enable (diff) | |
| download | linux-01a6908c0c7a0f7dfae50026945340b9efcd2e3e.tar.gz linux-01a6908c0c7a0f7dfae50026945340b9efcd2e3e.zip | |
drm/i915: use correct power domain for csr loading
Grabbing a runtime pm reference with intel_runtime_pm_get will only
prevent device D3. But dmc firmware is required even earlier (namely
for the skl power well 2).
Hence we need to grab a rpm reference higher up in the hierarchy. For
simplicity just grab the _INIT display power well. That's a bit too
much, but since the firmware loading task should completely fairly
quickly this won't be a real problem really.
Cc: Damien Lespiau <damien.lespiau@intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Cc: Sunil Kamath <sunil.kamath@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Tested-by: Daniel Stone <daniels@collabora.com> # SKL
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1446069547-24760-3-git-send-email-imre.deak@intel.com
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions