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| author | Will Deacon <will.deacon@arm.com> | 2019-06-11 12:47:34 +0100 |
|---|---|---|
| committer | Will Deacon <will.deacon@arm.com> | 2019-06-12 16:19:45 +0100 |
| commit | 01d57485fcdb9f9101a10a18e32d5f8b023cab86 (patch) | |
| tree | e59acccd8a79ac64da328eafa2e93f5fb012d74c /tools/perf/scripts/python | |
| parent | arm64: Don't unconditionally add -Wno-psabi to KBUILD_CFLAGS (diff) | |
| download | linux-01d57485fcdb9f9101a10a18e32d5f8b023cab86.tar.gz linux-01d57485fcdb9f9101a10a18e32d5f8b023cab86.zip | |
arm64: tlbflush: Ensure start/end of address range are aligned to stride
Since commit 3d65b6bbc01e ("arm64: tlbi: Set MAX_TLBI_OPS to
PTRS_PER_PTE"), we resort to per-ASID invalidation when attempting to
perform more than PTRS_PER_PTE invalidation instructions in a single
call to __flush_tlb_range(). Whilst this is beneficial, the mmu_gather
code does not ensure that the end address of the range is rounded-up
to the stride when freeing intermediate page tables in pXX_free_tlb(),
which defeats our range checking.
Align the bounds passed into __flush_tlb_range().
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Reported-by: Hanjun Guo <guohanjun@huawei.com>
Tested-by: Hanjun Guo <guohanjun@huawei.com>
Reviewed-by: Hanjun Guo <guohanjun@huawei.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions