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| author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2024-10-29 23:52:09 +0200 |
|---|---|---|
| committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2024-11-07 14:47:52 +0200 |
| commit | 06cb4527ef49d749cb8597017f40c74b34f7e8fd (patch) | |
| tree | 9248d8c7d60e8fc8d32c5e66938e9d20961afefa /tools/perf/scripts/python | |
| parent | drm/i915/cdclk: Extract intel_cdclk_guardband() and intel_cdclk_ppc() (diff) | |
| download | linux-06cb4527ef49d749cb8597017f40c74b34f7e8fd.tar.gz linux-06cb4527ef49d749cb8597017f40c74b34f7e8fd.zip | |
drm/i915/cdclk: Extract hsw_ips_min_cdclk()
Pull the whole BDW IPS min CDCLK stuff into the IPS code
so that all the details around IPS are contained in once
place.
Note that while
- min_cdclk = DIV_ROUND_UP(min_cdclk * 100, 95);
vs.
+ min_cdclk = max(DIV_ROUND_UP(crtc_state->pixel_rate * 100, 95), min_cdclk)
may look different, they are in fact the same because
min_cdclk==crtc_state->pixel_rate at this point in
intel_crtc_compute_min_cdclk() on BDW.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241029215217.3697-4-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions
