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| author | Athira Rajeev <atrajeev@linux.vnet.ibm.com> | 2022-06-10 19:11:02 +0530 |
|---|---|---|
| committer | Michael Ellerman <mpe@ellerman.id.au> | 2022-06-29 08:57:44 +1000 |
| commit | 0c90263339da3e4cdcbf57cfa43d6d866c3ac95e (patch) | |
| tree | 75721c8698d26078bf215f6ca1318585fade7d7c /tools/perf/scripts/python | |
| parent | 5196a27978dcc74251eab14cffa8fa96813e0365 (diff) | |
| download | linux-0c90263339da3e4cdcbf57cfa43d6d866c3ac95e.tar.gz linux-0c90263339da3e4cdcbf57cfa43d6d866c3ac95e.zip | |
selftests/powerpc/pmu: Add selftest for reserved bit check for MMCRA thresh_ctl field
Testcase for reserved bits in Monitor Mode Control Register A (MMCRA)
thresh_ctl bits. For MMCRA[48:51]/[52:55]) Threshold Start/Stop,
0b11110000/0b00001111 is reserved.
Signed-off-by: Athira Rajeev <atrajeev@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20220610134113.62991-25-atrajeev@linux.vnet.ibm.com
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions