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| author | James Hogan <james.hogan@imgtec.com> | 2016-09-01 17:30:07 +0100 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2016-10-04 16:13:57 +0200 |
| commit | 18022894eca1315851bfd0614f011fbc01e44d16 (patch) | |
| tree | f61b703336511bb9b9f4a469ce85553fedae290c /tools/perf/scripts/python | |
| parent | cpuidle: cpuidle-cps: Enable use with MIPSr6 CPUs. (diff) | |
| download | linux-18022894eca1315851bfd0614f011fbc01e44d16.tar.gz linux-18022894eca1315851bfd0614f011fbc01e44d16.zip | |
MIPS: traps: 64bit kernels should read CP0_EBase 64bit
When reading the CP0_EBase register containing the WG (write gate) bit,
the ebase variable should be set to the full value of the register, i.e.
on a 64-bit kernel the full 64-bit width of the register via
read_cp0_ebase_64(), and on a 32-bit kernel the full 32-bit width
including bits 31:30 which may be writeable.
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Signed-off-by: Matt Redfearn <matt.redfearn@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/14148/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions