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| author | Yannick Fertre <yannick.fertre@st.com> | 2019-03-29 08:39:42 -0400 |
|---|---|---|
| committer | Mauro Carvalho Chehab <mchehab+samsung@kernel.org> | 2019-04-22 10:29:31 -0400 |
| commit | 1a726df6078c2fa1ce07f1e086576977d99f7fcf (patch) | |
| tree | 196fcd2e330e359d598aaa2e8df51aeac394a722 /tools/perf/scripts/python | |
| parent | media: atmel: atmel-isc: removed ARGB32 added ABGR32 and XBGR32 (diff) | |
| download | linux-1a726df6078c2fa1ce07f1e086576977d99f7fcf.tar.gz linux-1a726df6078c2fa1ce07f1e086576977d99f7fcf.zip | |
media: platform: stm32: wait end of transmission
It is mandatory to write CEC_CFGR only when CECEN=0. To protect
transmission, a check have been added to delayed logical address
modification. This patch is necessary tp pass all tests of compliance.
Signed-off-by: Yannick Fertré <yannick.fertre@st.com>
Reviewed-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions