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| author | Imre Deak <imre.deak@intel.com> | 2025-09-30 21:24:46 +0300 |
|---|---|---|
| committer | Imre Deak <imre.deak@intel.com> | 2025-10-02 18:51:10 +0300 |
| commit | 1f95871207db4439a3116e9a86f5b5658a5157c4 (patch) | |
| tree | 6216f164300b9843a4adcd8e071b1cadb72713fb /tools/perf/scripts/python | |
| parent | fcf6bddebfe03574041d7bb5f7e3f18e6b46a426 (diff) | |
| download | linux-1f95871207db4439a3116e9a86f5b5658a5157c4.tar.gz linux-1f95871207db4439a3116e9a86f5b5658a5157c4.zip | |
drm/dp: Add helpers to query the branch DSC max throughput/line-width
Add helpers to query the DP DSC sink device's per-slice throughput as
well as a DSC branch device's overall throughput and line-width
capabilities.
v2 (Ville):
- Rename pixel_clock to peak_pixel_rate, document what the value means
in case of MST tiled displays.
- Fix name of drm_dp_dsc_branch_max_slice_throughput() to
drm_dp_dsc_sink_max_slice_throughput().
v3:
- Fix the DSC branch device minimum valid line width value from 2560
to 5120 pixels.
- Fix drm_dp_dsc_sink_max_slice_throughput()'s pixel_clock parameter
name to peak_pixel_rate in header file.
- Add handling for throughput mode 0 granular delta, defined by DP
Standard v2.1a.
v4:
- Remove the default switch case in
drm_dp_dsc_sink_max_slice_throughput(), which is unreachable in the
current code. (Ville)
Cc: dri-devel@lists.freedesktop.org
Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reported-and-tested-by: Swati Sharma <swati2.sharma@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Acked-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://lore.kernel.org/r/20250930182450.563016-3-imre.deak@intel.com
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions
