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authorVille Syrjälä <ville.syrjala@linux.intel.com>2025-10-14 22:18:02 +0300
committerVille Syrjälä <ville.syrjala@linux.intel.com>2025-10-16 18:19:55 +0300
commit2b4c2a5e4d7b26b884f3861108becae0098e3233 (patch)
tree9ccbf0a801cbcc8b8202ea632c84477ee018e5c6 /tools/perf/scripts/python
parent5021ccb44dc6a22a3508316442d1304371ca55db (diff)
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drm/i915/cdclk: Add prefill helpers for CDCLK
Add helpers to compute the CDCLKl adjustment factor for prefill calculations. The adjustment factor is always <= 1.0. That is, a faster CDCLK speeds up the pipe prefill. intel_cdclk_prefill_adjustment_worst() gives out a worst case estimate, meant to be used during guardband sizing. We can actually do better than 1.0 here because the absolute minimum CDCLK is limited by the dotclock. This will still allow planes, pfit, etc. to be changed any which way without having to resize the guardband yet again. intel_cdclk_prefill_adjustment() is supposed to give a more accurate value based on the current min cdclk for the pipe, but currently that is not yet available when this gets called. So for now use the same worst case estimate here. The returned numbers are in .16 binary fixed point. TODO: the intel_cdclk_prefill_adjustment_worst() approach here can result in guardband changes for DRRS. But I'm thinking that is fine since M/N changes will always happen on the legacy timing generator so guardband doesn't actually matter. May need to think about this a bit more though... v2: Use the worst case estimate always for now Reviewed-by: Uma Shankar <uma.shankar@intel.com> #v1 Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20251014191808.12326-4-ville.syrjala@linux.intel.com
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