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| author | Timur Kristóf <timur.kristof@gmail.com> | 2025-07-31 11:43:46 +0200 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2025-08-18 17:01:36 -0400 |
| commit | 427980c1cbd22bb256b9385f5ce73c0937562408 (patch) | |
| tree | cee6cf24edc2399def8f08a1486a18eb26b2cfe1 /tools/perf/scripts/python | |
| parent | drm/amd/display: replace min/max nesting with clamp() (diff) | |
| download | linux-427980c1cbd22bb256b9385f5ce73c0937562408.tar.gz linux-427980c1cbd22bb256b9385f5ce73c0937562408.zip | |
drm/amd/display: Don't overclock DCE 6 by 15%
The extra 15% clock was added as a workaround for a Polaris issue
which uses DCE 11, and should not have been used on DCE 6 which
is already hardcoded to the highest possible display clock.
Unfortunately, the extra 15% was mistakenly copied and kept
even on code paths which don't affect Polaris.
This commit fixes that and also adds a check to make sure
not to exceed the maximum DCE 6 display clock.
Fixes: 8cd61c313d8b ("drm/amd/display: Raise dispclk value for Polaris")
Fixes: dc88b4a684d2 ("drm/amd/display: make clk mgr soc specific")
Fixes: 3ecb3b794e2c ("drm/amd/display: dc/clk_mgr: add support for SI parts (v2)")
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Rodrigo Siqueira <siqueira@igalia.com>
Reviewed-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions