diff options
| author | Herve Codina <herve.codina@bootlin.com> | 2024-08-08 09:11:01 +0200 |
|---|---|---|
| committer | Christophe Leroy <christophe.leroy@csgroup.eu> | 2024-09-03 07:49:18 +0200 |
| commit | 442f3799fa387ab4c0c9b2d20490d582b96532d1 (patch) | |
| tree | aa10a64ffa22f70d9400f142a4bbc147a0c724e4 /tools/perf/scripts/python | |
| parent | dt-bindings: soc: fsl: cpm_qe: Add QUICC Engine (QE) TSA controller (diff) | |
| download | linux-442f3799fa387ab4c0c9b2d20490d582b96532d1.tar.gz linux-442f3799fa387ab4c0c9b2d20490d582b96532d1.zip | |
soc: fsl: cpm1: tsa: Remove unused registers offset definition
SISTR, SICMR and SIRP registers offset definitions are not used.
In order to avoid unneeded code, remove them.
Signed-off-by: Herve Codina <herve.codina@bootlin.com>
Reviewed-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Link: https://lore.kernel.org/r/20240808071132.149251-9-herve.codina@bootlin.com
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions