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| author | Mika Kuoppala <mika.kuoppala@linux.intel.com> | 2019-10-15 18:44:41 +0300 |
|---|---|---|
| committer | Chris Wilson <chris@chris-wilson.co.uk> | 2019-10-15 18:15:59 +0100 |
| commit | 4aa0b5d457f5d29522b5db4aeb4587fc4dc24054 (patch) | |
| tree | c8f47049dabe546301b0aae8a9d0957272e87f88 /tools/perf/scripts/python | |
| parent | drm/i915/tgl: Include ro parts of l3 to invalidate (diff) | |
| download | linux-4aa0b5d457f5d29522b5db4aeb4587fc4dc24054.tar.gz linux-4aa0b5d457f5d29522b5db4aeb4587fc4dc24054.zip | |
drm/i915/tgl: Add HDC Pipeline Flush
Add hdc pipeline flush to ensure memory state is coherent
in L3 when we are done.
v2: Flush also in breadcrumbs (Chris)
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20191015154449.10338-3-mika.kuoppala@linux.intel.com
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions