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| author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2013-01-24 15:29:47 +0200 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-01-24 23:22:24 +0100 |
| commit | 4b0599854b5669fbbb6c8b9a9463b550718bda11 (patch) | |
| tree | 34262e1d27cd23a00c1d80e603857bb6a4913593 /tools/perf/scripts/python | |
| parent | drm/i915: Pipe timing registers need an offset on VLV (diff) | |
| download | linux-4b0599854b5669fbbb6c8b9a9463b550718bda11.tar.gz linux-4b0599854b5669fbbb6c8b9a9463b550718bda11.zip | |
drm/i915: Pipe palette registers need an offset on VLV
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions