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| author | Sean Christopherson <seanjc@google.com> | 2022-05-12 22:27:16 +0000 |
|---|---|---|
| committer | Sean Christopherson <seanjc@google.com> | 2022-07-08 14:57:20 -0700 |
| commit | 54ad60ba9d2673293c72a7c1c4f092622a1f8789 (patch) | |
| tree | e6863ffb0bc7bd25c521d37e6aca80be59c39f33 /tools/perf/scripts/python | |
| parent | KVM: x86: Use explicit case-statements for MCx banks in {g,s}et_msr_mce() (diff) | |
| download | linux-54ad60ba9d2673293c72a7c1c4f092622a1f8789.tar.gz linux-54ad60ba9d2673293c72a7c1c4f092622a1f8789.zip | |
KVM: x86: Add helpers to identify CTL and STATUS MCi MSRs
Add helpers to identify CTL (control) and STATUS MCi MSR types instead of
open coding the checks using the offset. Using the offset is perfectly
safe, but unintuitive, as understanding what the code does requires
knowing that the offset calcuation will not affect the lower three bits.
Opportunistically comment the STATUS logic to save readers a trip to
Intel's SDM or AMD's APM to understand the "data != 0" check.
No functional change intended.
Signed-off-by: Sean Christopherson <seanjc@google.com>
Reviewed-by: Jim Mattson <jmattson@google.com>
Link: https://lore.kernel.org/r/20220512222716.4112548-4-seanjc@google.com
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions