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authorGregory CLEMENT <gregory.clement@bootlin.com>2018-03-01 14:18:19 +0100
committerGregory CLEMENT <gregory.clement@bootlin.com>2018-03-09 17:49:46 +0100
commit597667d889517c6085d57aac92dbf1cc624cd8ae (patch)
treedb56705679a0d3e225d68b1045590b1944fc2fb8 /tools/perf/scripts/python
parentarm64: dts: marvell: use reworked NAND controller driver on Armada 8K (diff)
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ARM64: dts: marvell: armada-cp110: Add apb_pclk clock for the uart nodes
This extra clock is needed to access the registers of the UARTs used on CP110 component of the Armada 7K/8K SoCs. Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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