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authorJernej Skrabec <jernej.skrabec@siol.net>2021-01-06 19:19:01 +0100
committerMaxime Ripard <maxime@cerno.tech>2021-01-07 10:39:37 +0100
commit62de535663e8bf4a5442bb11de7e4926a00eb93c (patch)
tree9788a16c96935a12d69fbc15f30f651659290b25 /tools/perf/scripts/python
parentdt-bindings: media: Add Allwinner R40 deinterlace compatible (diff)
downloadlinux-62de535663e8bf4a5442bb11de7e4926a00eb93c.tar.gz
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ARM: dts: sun8i: r40: Add deinterlace node
R40 contains deinterlace core compatible to that in H3. One peculiarity is that RAM gate is shared with CSI1. User manual states it's separate but that's not true. Shared gate was verified with BSP Linux code check and with runtime tests (CPU crashed if CSI1 gate was not ungated). Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20210106181901.1324075-3-jernej.skrabec@siol.net
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