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| author | Yao Zi <ziyao@disroot.org> | 2025-02-17 06:11:43 +0000 |
|---|---|---|
| committer | Heiko Stuebner <heiko@sntech.de> | 2025-02-26 18:04:29 +0100 |
| commit | 651aabc9fb0f354ad2ba5fd06a6011e652447489 (patch) | |
| tree | c2542ed754b4ab885c43435969ca2de2a7e3969c /tools/perf/scripts/python | |
| parent | Merge branch 'v6.15-shared/clkids' into v6.15-clk/next (diff) | |
| download | linux-651aabc9fb0f354ad2ba5fd06a6011e652447489.tar.gz linux-651aabc9fb0f354ad2ba5fd06a6011e652447489.zip | |
clk: rockchip: Add PLL flag ROCKCHIP_PLL_FIXED_MODE
RK3528 comes with a new PLL variant: its "PPLL", which mainly generates
clocks for the PCIe controller, operates in normal mode only. Let's
describe it with flag ROCKCHIP_PLL_FIXED_MODE and handle it in code.
Signed-off-by: Yao Zi <ziyao@disroot.org>
Link: https://lore.kernel.org/r/20250217061142.38480-7-ziyao@disroot.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions