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authorHawking Zhang <Hawking.Zhang@amd.com>2022-10-14 15:17:43 +0800
committerAlex Deucher <alexander.deucher@amd.com>2022-10-17 17:41:21 -0400
commit6c0ca748205dc815505c6de79ecf565953390b66 (patch)
treecf1f34297412197fa00576e14ded7e8ca7c50f51 /tools/perf/scripts/python
parentdrm/amd/pm: add SMU IP v13.0.4 IF version define to V7 (diff)
downloadlinux-6c0ca748205dc815505c6de79ecf565953390b66.tar.gz
linux-6c0ca748205dc815505c6de79ecf565953390b66.zip
drm/amdgpu: move convert_error_address out of umc_ras
RAS error address translation algorithm is common across dGPU and A + A platform as along as the SOC integrates the same generation of UMC IP. UMC RAS is managed by x86 MCA on A + A platform, umc_ras in GPU driver is not initialized at all on A + A platform. In such case, any umc_ras callback implemented for dGPU config shouldn't be invoked from A + A specific callback. The change moves convert_error_address out of dGPU umc_ras structure and makes it share between A + A and dGPU config. Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Stanley Yang <Stanley.Yang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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