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authorVille Syrjälä <ville.syrjala@linux.intel.com>2023-04-26 16:50:17 +0300
committerVille Syrjälä <ville.syrjala@linux.intel.com>2023-05-04 16:01:44 +0300
commit6ec91794ce4aad0e92a16028885a7b139fe363ae (patch)
tree234347f6f0c2983852d7c2a08969bc116e385c2d /tools/perf/scripts/python
parentdrm/i915: s/PS_COEE_INDEX_AUTO_INC/PS_COEF_INDEX_AUTO_INC/ (diff)
downloadlinux-6ec91794ce4aad0e92a16028885a7b139fe363ae.tar.gz
linux-6ec91794ce4aad0e92a16028885a7b139fe363ae.zip
drm/i915: Define bitmasks for skl+ scaler window pos/size
Define and use the bitmasks for the x/y components of the skl+ scaler window pos/size registers. We stick to the full 16 bits mask here even though the hardware limits are actually lower. The current (ADL) hardware maximums are in fact: 14 bits for X size, 13 bits for X pos, 13 bits for Y size/pos. Yes, that is correct, X pos has less bits than the X size for some reason. But that doesn't actually matter for now as we don't currently even support such wide displays without the use of bigjoiner (due to max plane width limit). v2: Switch back to full 16bit masks since that's what we use transcoder timign regs and PIPESRC as well Cc: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230426135019.7603-6-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
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